The invention relates generally to an FFT processor particularly suited for Discrete Multitone (DMT) processing, and in particular, to a very high-speed DMT engine that is multiplexed between the channels in a multichannel central office asymmetric digital subscriber line (CO ADSL) application.
CDSL DMT is at the core of digital subscriber line (DSL) modems. In a multichannel CO ADSL application, a DMT engine does the core processing. Each channel must have a DMT engine or a very fast DMT engine has to be multiplexed among the channels. The DMT signal is produced in the transmitter and is formally obtained by summing pairs of orthogonal sine/cosine waves, each pair having frequency different from all other pairs in the sum. Sine and cosine waves in each pair are amplitude modulated by the data item corresponding to that pair (also called tone). When the frequencies of the tones are harmonically related, as is usually the case, the most natural and easy way to generate the DMT signal is by means of an Inverse Discrete Fourier Transform, itself almost always executed with a FFT type of algorithm to substantially reduce the amount of computations performed. The DMT signal is real valued (as opposed to complex valued) so the IFFT input is conjugate symmetric. Since in a conjugate symmetric data block, half of the data is redundant (one half can be obtained from the other half by negating the imaginary part) the size of the IFFT used can be half of that usually required. This comes with a price, however, in the form of a special formatting of the data before the IFFT, called pretwiddling pass, which involves multiplications by twiddle factors and grouping. A Forward FFT performs demodulation of the DMT signal in the receiver. Here again, since the input to the Forward FFT is real valued, a half-size FFT algorithm can be used, with the price paid being the so-called post twiddling computation on the result of the Forward FFT.
Proposals have been made for more effectively producing the DMT sum of sine/cosine pairs. Some use transforms to speed up the FFT, e.g. FFT through Walsh Transform, while others have used combinations of sine and cosine transforms which are inherently real, e.g. Hartley transform or similar real valued FFTs. However, the real valued FFT algorithm used in the present invention has never been considered or even mentioned in the context of DSL modulators/demodulators, nor has it been used for a computational pipeline for a DMT engine with substantially reduced computational time. In addition, CO ADSL applications impose constraints on a DMT engine's latency and SNR, which have not been considered in previous implementations of processors using the algorithm.